Dr. Jaspinder Kaur
Assistant Professor - I
Specialization
Cache Side Channel Attacks, Microarchitectural Security, Computer Architecture
jaspinder.kaur@thapar.edu
Cache Side Channel Attacks, Microarchitectural Security, Computer Architecture
Education
1. PhD in Computer Science and Engineering from Indian Institute of Technology Ropar.
o Title – Performance Efficient Cache Partitioning based Defense Mechanisms against Cross-Core Side Channel Attacks
2. M. Tech. in Computer Science and Engineering from Punjabi University Patiala.
3. B. Tech. in Computer Science and Engineering from LPU, Jalandhar.
Experience
1. Research Intern, Ericsson Bengaluru, June-December,2023
2. Program Analyst Trainee, Cognizant Chennai, October,2014 - May,2015
Journal publications
1. Jaspinder Kaur, and Shirshendu Das. "TPPD: Targeted Pseudo Partitioning based Defence for cross-core covert channel attacks." Journal of Systems Architecture 135 (2023): 102805 (Impact Factor-3.7, SCIE Indexed).
2. Jaspinder Kaur, and Shirshendu Das. "RSPP: Restricted Static Pseudo-Partitioning for Mitigation of Cross-Core Covert Channel Attacks." ACM Transactions on Design Automation of Electronic Systems 29.2 (2024): 1-22 (Impact Factor-2.2, SCIE Indexed).
3. Jaspinder Kaur, and Shirshendu Das. "A survey on cache timing channel attacks for multicore processors." Journal of Hardware and Systems Security 5.2 (2021): 169-189.
Conference publications
1. Jaspinder Kaur, and Shirshendu Das. "ACPC: Covert Channel Attack on Last Level Cache using Dynamic Cache Partitioning." 2023 24th International Symposium on Quality Electronic Design (ISQED). IEEE, 2023. (SCOPUS Indexed).
2. Agarwal, Anurag, Jaspinder Kaur, and Shirshendu Das. "Exploiting secrets by leveraging dynamic cache partitioning of last level cache." 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, 2021. (SCOPUS Indexed)
3. Angelic, Mahobe, M., Jaspinder Kaur., & Das, S. (2022). Near data processing and its applications. In Soft Computing: Theories and Applications: Proceedings of SoCTA 2021 (pp. 729-739). Singapore: Springer Nature Singapore. (SCOPUS Indexed).
4. Manaal Mukhtar Jamadar, Jaspinder Kaur, and Shirshendu Das. 2022. MAPCP: Memory Access Pattern Classifying Prefetcher. In Proceedings of the International Symposium on Memory Systems (MEMSYS '21). Association for Computing Machinery, New York, NY, USA, Article 8, 1–12. https://doi.org/10.1145/3488423.3519328 (SCOPUS Indexed).
5. S. Kumar, S. Das, M. M. Jamadar and Jaspinder Kaur, "Efficient On-chip Communication for Neuromorphic Systems," 2021 IEEE SmartWorld, Ubiquitous Intelligence & Computing, Advanced & Trusted Computing, Scalable Computing & Communications, Internet of People and Smart City Innovation (SmartWorld/SCALCOM/UIC/ATC/IOP/SCI), Atlanta, GA, USA, 2021, pp. 234-239, doi: 10.1109/SWC50871.2021.00040. (SCOPUS Indexed)
6. Jaspinder Kaur, and Brahmaleen Kaur Sidhu. "A new flower pollination based task scheduling algorithm in a cloud environment." 2017 4th International Conference on Signal Processing, Computing and Control (ISPCC). IEEE, 2017.